Triconex 3009 Main Processor Module

Triconex 3009 Main Processor Module

Functional Description

The 3009 is a Main Processor Module, It has 256 MB DRAM (without battery backup) and 2 MB NVRAM

(SRAM with battery backup).

A Tricon chassis houses three Main Processor (MP)Modules,each serving one channel (also referred to as a

leg)of the controller.Each processor independently communicates with its I/O subsystem and executes the

control program.The three MP Modules compare data and the control program at regular intervals. Each

Main Processor operates autonomously with no shared clocks,power regulators,or circuitry. Processor

specifications are listed in the specifications table for each MP.

A high-speed proprietary bus system called TriBus provides these functions: interprocessor 

communications, hardware majority voting of all digital input data,and comparison of control program

variables.TriBus uses a fully isolated,serial communication channel,which operates at 25 Mbps with the Model

3009 MPs when they are installed in the Model 8110 Main Chassis,and at 1000 Mbps when the Model 3009

MPs are installed in the Model 8120E Enhanced Performance Main Chassis. A direct memory access

controller manages the synchronization,transfer,voting, and data correction independent of the control

program or executive software.

DRAM (dynamic random-access memory)is used for control program,sequence-of-events data, I/O

data,diagnostics,and communication buffers.SRAM (static random-access memory) is used for the defined

program retentives and configuration of disabled points. Memory is regularly validated by the TriBus

hardware-voting circuitry.

To guarantee that the controller provides a deterministic response time,the scan time should always be set to

a value greater than the I/O poll time (the maximum time needed by the controller to obtain data from the

input modules).

Technical Specifications